1. Field of the Invention
The present invention relates to scribe lines on a wafer, and more particularly, to scribe lines for increasing wafer utilizable area and semiconductor chip yields.
2. Description of the Prior Art
With the development of integrated circuit technology, semiconductor chips have been made from wafers of semiconductor material whereby each chip contains a plurality of integrated circuits. After the wafer is completed, an individual chip is typically separated from other chips by dicing the wafer into small chips. Thereafter, the individual chips are mounted on carriers of various types, interconnected by wires and further packaged.
A scribe line is used to scribe and break the semiconductor wafer into individual dies. Please refer to FIG. 1 of a top view of scribe lines on a wafer according to the prior art. As shown in FIG. 1, the wafer includes a plurality of dies 10 arranged in a matrix, a plurality of vertical scribe lines X arranged in columns of the die matrix, and a plurality of horizontal scribe lines Y arranged in rows of the die matrix. In a typical semiconductor manufacturing process, the scribe lines X and Y are trenches, and the scribe lines X and Y are of an identical width Wx and Wy, respectively. A range of the scribe line widths Wx and Wy is from tens to hundreds of micrometers, depending on the contents in the scribe lines.
Alignment marks or test keys are normally formed in the scribe lines X and Y for providing element alignment or defects monitoring at each manufacturing process step. When the alignment marks or test keys are formed in the scribe lines X and Y, the width Wx and Wy may reach approximately 150 micrometers. However, with the development of the complicated circuits on the chips, the scribe lines get broader. A scribe line width of hundreds of micrometers is thought to occupy a relatively large portion of the wafer, thus reducing the wafer utilizable area for producing the dies. In addition, problems such as uneven scribing or cracks are unavoidable for the broadened scribe lines to reduce production yields.
It is therefore an objective of the claimed invention to provide scribe lines for increasing a wafer utilizable area and improving semiconductor chip yields.
According to the claimed invention, the scribe lines include at least a first scribe line arranged in a first direction in a first gap of a plurality of dies, and at least a second scribe line arranged in the first direction in a second gap of the dies. The first scribe line includes at least an alignment mark or a test key, therefore having a width greater than a width of the second scribe line that is provided for dicing a wafer into a plurality of individual dies. In addition, the scribe lines further include a plurality groups of scribe lines arranged in different directions, and each group of the scribe lines may have various scribe line widths.
It is an advantage of the present invention that the width of each scribe line is determined according to the contents therein. For example, a greater width is required for the scribe line having a measurement device, such as an alignment mark or a test key. A narrower width is required for the scribe line having no measurement device. Therefore, the width of the scribe line without measurement device therein is reduce to half or even one-third of the width of the scribe line with measurement device therein. As a result, the wafer utilizable area is increased, and non-uniform problems of wafer dicing are prevented.
These and other objectives of the claimed invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings.